@inproceedings{b2368004625b4264ba817675d5f93c29,
title = "A 0.3mm2 10-b 100MS/s pipelined ADC using Nauta structure op-amps in 180nm CMOS",
abstract = "We present a standard pipelined ADC design using Nauta structure differential op-amps as an alternative to traditional analog op-amps. The six stage pipelined ADC is capable of running at 100MS/s and achieves 8 bit resolution under simulations. The research is focused on the path to scaling to deep sub-micron CMOS and finding alternatives to the reduced gain and low output voltage swing of traditional analog op-amp designs. The Nauta structure op-amp allows us to produce one of the smallest reported areas for a 180nm pipelined ADC occupying only 0.3mm2 for a 10 bit 100MS/s pipelined ADC.",
keywords = "180nm CMOS, Analog to Digital Conversion, Nauta structure, Pipelined ADC",
author = "Andrew Nicholson and Julian Jenkins and Irfansyah, {Astria Nur} and Nonie Politi and {Van Schaik}, Andre and Hamilton, {Tara Julia} and Torsten Lehmann",
year = "2013",
doi = "10.1109/ISCAS.2013.6572222",
language = "English",
isbn = "9781467357609",
series = "Proceedings - IEEE International Symposium on Circuits and Systems",
pages = "1833--1836",
booktitle = "2013 IEEE International Symposium on Circuits and Systems, ISCAS 2013",
note = "2013 IEEE International Symposium on Circuits and Systems, ISCAS 2013 ; Conference date: 19-05-2013 Through 23-05-2013",
}