TY - JOUR
T1 - A statistical design approach using fixed and variable width transconductors for positive-feedback gain-enhancement OTAs
AU - Nicholson, Andrew Peter
AU - Irfansyah, Astria Nur
AU - Jenkins, Julian
AU - Hamilton, Tara Julia
AU - Lehmann, Torsten
N1 - Publisher Copyright:
© 2017 IEEE.
PY - 2017/6
Y1 - 2017/6
N2 - The positive-feedback gain-enhancement operational transconductance amplifier (OTA) design is a promising architecture to scale into deep submicron CMOS. Ever smaller CMOS process nodes require analog circuit designs that can overcome the area-power-matching relation. We introduce a Nauta OTA with a split architecture consisting of fixed width and digitally programmable variable width transconductors utilizing the minimum grid-spacing of the CMOS process enabling an active mismatch cancelation technique. A variation-aware statistical design practice is introduced to analyze the sizing of transconductors, computing code-word solutions for statistically likely solutions, and estimating average maximum dc gain over the entire code-space of many simulated OTAs. Prototypes of a 8-bit differential OTA in 180-nm CMOS designed using the Nauta structure fixed width and digitally programmable variable width architecture achieves an average maximum dc gain of 60 dB, simulated unity gain frequency of 4.6 GHz, and a figure-of-merit of 1 GHz/mW.
AB - The positive-feedback gain-enhancement operational transconductance amplifier (OTA) design is a promising architecture to scale into deep submicron CMOS. Ever smaller CMOS process nodes require analog circuit designs that can overcome the area-power-matching relation. We introduce a Nauta OTA with a split architecture consisting of fixed width and digitally programmable variable width transconductors utilizing the minimum grid-spacing of the CMOS process enabling an active mismatch cancelation technique. A variation-aware statistical design practice is introduced to analyze the sizing of transconductors, computing code-word solutions for statistically likely solutions, and estimating average maximum dc gain over the entire code-space of many simulated OTAs. Prototypes of a 8-bit differential OTA in 180-nm CMOS designed using the Nauta structure fixed width and digitally programmable variable width architecture achieves an average maximum dc gain of 60 dB, simulated unity gain frequency of 4.6 GHz, and a figure-of-merit of 1 GHz/mW.
KW - Deep submicron CMOS
KW - Digitally assisted analog design
KW - Positive-feedback gain-enhancement operational transconductance amplifier (OTA)
UR - http://www.scopus.com/inward/record.url?scp=85014138540&partnerID=8YFLogxK
U2 - 10.1109/TVLSI.2017.2657885
DO - 10.1109/TVLSI.2017.2657885
M3 - Article
AN - SCOPUS:85014138540
SN - 1063-8210
VL - 25
SP - 1966
EP - 1977
JO - IEEE Transactions on Very Large Scale Integration (VLSI) Systems
JF - IEEE Transactions on Very Large Scale Integration (VLSI) Systems
IS - 6
M1 - 7864467
ER -