Analysis and design considerations of systematic nonlinearity for sigma-delta current-steering DAC

Astria Nur Irfansyah, Torsten Lehmann, Julian Jenkins, Tara Julia Hamilton

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

6 Citations (Scopus)

Abstract

This paper deals with the design aspect of current-steering D/A converters which is to be incorporated in an oversampling sigma-delta DAC with Dynamic Element Matching (DEM), and particularly with the trade-off between device sizing, output impedance, and ideal systematic non-linearity. A formula for the estimation of minimum output impedance requirement based on DNL specification is proposed, and the corresponding design guideline is given. As a case study, a 16-bit sigma-delta current-steering DAC is presented. It is shown in this paper that basic cascode current mirror structure is not practical for this purpose. An 8-level current steering DAC with 16-bit accuracy was designed in a 0.18-μm CMOS process using the regulated cascode enhanced output impedance current mirror. A worst case INL of 0.09 LSB of a 16-bit converter was achieved.

Original languageEnglish
Title of host publicationIEEE 2013 Tencon - Spring, TENCONSpring 2013 - Conference Proceedings
Pages108-111
Number of pages4
DOIs
Publication statusPublished - 2013
Externally publishedYes
Event2013 1st IEEE TENCON Spring Conference, TENCONSpring 2013 - Sydney, NSW, Australia
Duration: 17 Apr 201319 Apr 2013

Publication series

NameIEEE 2013 Tencon - Spring, TENCONSpring 2013 - Conference Proceedings

Conference

Conference2013 1st IEEE TENCON Spring Conference, TENCONSpring 2013
Country/TerritoryAustralia
CitySydney, NSW
Period17/04/1319/04/13

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