Design strategy for enhanced output impedance current-steering DAC in sigma-delta converters

Astria Nur Irfansyah, Torsten Lehmann, Julian Jenkins, Tara Julia Hamilton

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

1 Citation (Scopus)

Abstract

This paper analyses the design trade-off of a high-output impedance current mirror structure used as a current-steering DAC in a sigma-delta modulation DAC with dynamic element matching. The aim is to provide a design strategy with transistor sizing guidelines leading to the achievement of high static linearity and high accuracy given specific accuracy, load resistance, and voltage swing requirement. Challenging factors limiting the circuit static linearity are described and shown. A test chip implemented in 180nm CMOS process has been designed and fabricated, with simulated results showing static linearity of a 16-bit DAC has been achieved.

Original languageEnglish
Title of host publication2013 IEEE 56th International Midwest Symposium on Circuits and Systems, MWSCAS 2013
Pages289-292
Number of pages4
DOIs
Publication statusPublished - 2013
Event2013 IEEE 56th International Midwest Symposium on Circuits and Systems, MWSCAS 2013 - Columbus, OH, United States
Duration: 4 Aug 20137 Aug 2013

Publication series

NameMidwest Symposium on Circuits and Systems
ISSN (Print)1548-3746

Conference

Conference2013 IEEE 56th International Midwest Symposium on Circuits and Systems, MWSCAS 2013
Country/TerritoryUnited States
CityColumbus, OH
Period4/08/137/08/13

Fingerprint

Dive into the research topics of 'Design strategy for enhanced output impedance current-steering DAC in sigma-delta converters'. Together they form a unique fingerprint.

Cite this