TY - GEN
T1 - Examination timetabling automation and optimization using greedy-simulated annealing hyper-heuristics algorithm
AU - Kusumawardani, Dian
AU - Muklason, Ahmad
AU - Supoyo, Vicha Azthanty
N1 - Publisher Copyright:
© 2019 IEEE.
PY - 2019/7
Y1 - 2019/7
N2 - Examination timetabling problem (ETP) is one of challenging combinatorial optimization problems, either scientifically or practically. In the scientific literatures, ETP has been proven as a non-deterministic polynomial (NP)-hard problem. In practice, examination timetabling is known as tedious and stressful work especially when double degree was offered by the university. In this study, two real-world datasets of ETP are introduced and solved using a combination of graph-coloring based sequential greedy algorithm and simulated annealing (SA) algorithm. Different from the state-of-the-art approaches in the literature, in which SA was employed within meta-heuristics, in this study SA was implemented within hyper-heuristics framework. The experimental results show that the proposed algorithm successfully automate the timetabling process and generates better timetable compared to the timetable generated manually. More specifically, tested over the two datasets the proposed algorithm, in terms of soft constraint penalty that should be minimized, could improve manual timetable from 39,569 to 33,649 and from 76,763 to 34, 929. In addition to new real datasets, the main contribution of this study is a better understanding on the performance of Simulated Annealing within hyper-heuristics for solving real-world examination timetabling problem.
AB - Examination timetabling problem (ETP) is one of challenging combinatorial optimization problems, either scientifically or practically. In the scientific literatures, ETP has been proven as a non-deterministic polynomial (NP)-hard problem. In practice, examination timetabling is known as tedious and stressful work especially when double degree was offered by the university. In this study, two real-world datasets of ETP are introduced and solved using a combination of graph-coloring based sequential greedy algorithm and simulated annealing (SA) algorithm. Different from the state-of-the-art approaches in the literature, in which SA was employed within meta-heuristics, in this study SA was implemented within hyper-heuristics framework. The experimental results show that the proposed algorithm successfully automate the timetabling process and generates better timetable compared to the timetable generated manually. More specifically, tested over the two datasets the proposed algorithm, in terms of soft constraint penalty that should be minimized, could improve manual timetable from 39,569 to 33,649 and from 76,763 to 34, 929. In addition to new real datasets, the main contribution of this study is a better understanding on the performance of Simulated Annealing within hyper-heuristics for solving real-world examination timetabling problem.
KW - Examination Timetabling
KW - Greedy Algorithm
KW - Hyper-Heuristic
KW - Java
KW - Simulated Annealing
UR - http://www.scopus.com/inward/record.url?scp=85073545510&partnerID=8YFLogxK
U2 - 10.1109/ICTS.2019.8850932
DO - 10.1109/ICTS.2019.8850932
M3 - Conference contribution
AN - SCOPUS:85073545510
T3 - Proceedings of 2019 International Conference on Information and Communication Technology and Systems, ICTS 2019
SP - 164
EP - 169
BT - Proceedings of 2019 International Conference on Information and Communication Technology and Systems, ICTS 2019
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 12th International Conference on Information and Communication Technology and Systems, ICTS 2019
Y2 - 18 July 2019
ER -