Abstract
The tracking performance of a phase-locked loop (PLL) algorithm in grid-connected power electronic systems significantly contributes to the success of grid synchronization. This paper presents an efficient software realization of SOGI-PLL (second order generalized integrator – phase locked loop), as one of the most popular single-phase grid synchronization strategies in practice. The utilization of floating-point processors has been relatively common; however in this work, the SOGI-PLL is implemented using the fixed-point arithmetic technique in consideration of delivering a low-cost and compact hardware solution. Fixed-point microcontrollers or DSPs are still widely used by many researchers, developers, and practical engineers due to their cost-efficient implementation in both hardware and development software tools. In this work, the implementation of the SOGI-PLL algorithm in fixed-point arithmetic is demonstrated using C programming in a low-cost 16-bit fixed-point DSC dsPIC30F3014 with a 20 MHz crystal clock. Based on the implementation results, the developed SOGI-PLL algorithm can accurately estimate the grid’s fundamental voltage parameters such as the voltage magnitude, phase angle, and frequency.
| Original language | English |
|---|---|
| Pages (from-to) | 1281-1295 |
| Number of pages | 15 |
| Journal | International Journal of Innovative Computing, Information and Control |
| Volume | 19 |
| Issue number | 4 |
| DOIs | |
| Publication status | Published - Aug 2023 |
Keywords
- Fixed-point arithmetic
- Grid-connected inverter
- SOGI-PLL
- Single-phase grid
- Synchronization
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