Low-noise dynamic comparator circuit with selectable input-referred thermal noise voltage

M. Yazid*

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

2 Citations (Scopus)


A new method for reducing input-referred thermal noise of dynamic comparator circuit without increasing load capacitance as commonly used in the conventional method is proposed. An implementation circuit with selectable low-noise mode operation is presented, which enable both low-noise mode and standard mode operation by a single circuit. Simulation in 180 nm CMOS process technology shows that the proposed new method and circuit topology can achieve up to 90% increase in gain of comparator first stage, resulting in up to 40% decrease in input-referred thermal noise voltage, compared with a conventional circuit with similar load capacitance. The proposed circuit is also able to operate with similar performance as the conventional circuit when low-noise mode operation is not necessary.

Original languageEnglish
Pages (from-to)1210-1212
Number of pages3
JournalElectronics Letters
Issue number21
Publication statusPublished - 18 Oct 2018


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